Ensuring the long-term reliability of resistive change memory devices presents significant engineering challenges. For example, the resistance of a high-resistance state for a resistive change memory cell may decrease over time as the resistive change memory cell is repeatedly programmed. This decrease causes the resistive change memory cell, and thus of the resistive change memory device that includes the resistive change memory cell, to have what is referred to herein as write endurance. The term “write endurance” means the number of set/reset cycles a resistive change memory cell undergo before the reset resistance and the set resistance of the resistive change memory cell cannot be distinguished rapidly and reliably. In addition, a limited number of resistive change memory cells in a device may be programmed disproportionately, causing those resistive change memory cells to wear out more quickly than other resistive change memory cells in the device. Accordingly, there is a need for techniques to detect, characterize, and mitigate degradation of resistive change memory devices.
Like reference numerals refer to corresponding parts throughout the drawings.